| Paper: | WA-L6.2 |
| Session: | Implementation of Image and Video Processing Systems I |
| Time: | Wednesday, September 19, 10:10 - 10:30 |
| Presentation: |
Lecture
|
| Title: |
SEQUENTIAL, IRREGULAR AND COMPLEX OBJECT CONTOUR TRACING ON FPGA |
| Authors: |
Kumara Ratnayake; Concordia University | | |
| | Aishy Amer; Concordia University | | |
| Abstract: |
This paper proposes a real-time, robust, scalable and compact Field Programmable Gate Array (FPGA) based architecture and its implementation of contour tracing of video signals, which is an extension to our previous research on FPGA-based object segmentation. Achieving real-time performance on general purpose sequential processors is difficult due to the heavy computational complexity in contour tracing, thus a hardware acceleration is inevitable. Our finding to the existing related work confirms that the proposed architecture is much more feasible and cost effective. Our implementation achieved an optimum processing clock of 158 MHz while utilizing minimal hardware resources and power. The proposed FPGA design was successfully simulated, synthesized and verified for its functionality, accuracy and performance on an actual hardware platform which consists of a frame grabber with a user programmable Xilinx Virtex-4 SX35 FPGA. |
